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1 instruction address register
instruction address register Befehlsadressenregister nEnglish-German dictionary of Electrical Engineering and Electronics > instruction address register
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2 instruction counting register
instruction counting register Befehlszählerregister nEnglish-German dictionary of Electrical Engineering and Electronics > instruction counting register
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3 instruction address register
IAR, instruction address registerEnglish-Russian dictionary of planing, cross-planing and slotting machines > instruction address register
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4 instruction counter register
English-Russian dictionary of Information technology > instruction counter register
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5 instruction address register
Англо-русский словарь технических терминов > instruction address register
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6 instruction address register
1) Военный термин: журнал учёта рассылки распоряжений2) Вычислительная техника: регистр адреса команды, счётчик командУниверсальный англо-русский словарь > instruction address register
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7 instruction counter register
Вычислительная техника: регистр счётчика командУниверсальный англо-русский словарь > instruction counter register
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8 instruction counting register
Вычислительная техника: счётчик командУниверсальный англо-русский словарь > instruction counting register
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9 Instruction to Register
SWIFTMT 500: сообщение этого типа отправляется владельцем счета в адрес обслуживающей счет организации. Владелец счета может быть глобальным кастодианом (global custodian), который имеет счет у своего местного агента (local agent) или субкастодиана (sub custodian); местным агентом (субкастодианом), который имеет счет у своего клирингового агента, либо регистратором или финансовой организацией, которые имеют счет у местного агента (субкастодиана).Сообщение используется для передачи инструкций по регистрации финансового инструмента держателем реестра, а также для отмены инструкций по регистрации, ранее направленных владельцем счетаИнтернет:www.iso15022.org/uhb/uhb2008/finmt500.htmАнгло-русский словарь терминов по депозитарному хранению и клирингу > Instruction to Register
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10 instruction address register
(IAR) < edp> ■ Befehlsadressenregister nEnglish-german technical dictionary > instruction address register
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11 instruction counting register
< edp> ■ Befehlszählerregister nEnglish-german technical dictionary > instruction counting register
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12 instruction address register
= IAREnglish-Russian electronics dictionary > instruction address register
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13 instruction address register
The New English-Russian Dictionary of Radio-electronics > instruction address register
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14 instruction address register
English-Russian dictionary of computer science and programming > instruction address register
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15 instruction counting register
English-Russian dictionary of computer science and programming > instruction counting register
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16 instruction address register
• registar adrese naredbe -
17 instruction address register
• IAR-rekisteri -
18 instruction address register
opdrachtadresregisteropdrachtentellerEnglish-Dutch technical dictionary > instruction address register
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19 instruction counter register
Англо-русский словарь компьютерных и интернет терминов > instruction counter register
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20 instruction counter register
English-Russian dictionary of terms that are used in computer games > instruction counter register
См. также в других словарях:
instruction address register — komandų skaitiklis statusas T sritis automatika atitikmenys: angl. command counter; control counter; control register; instruction address register; instruction counter; operation address register; program counter; program address counter;… … Automatikos terminų žodynas
instruction counter — komandų skaitiklis statusas T sritis automatika atitikmenys: angl. command counter; control counter; control register; instruction address register; instruction counter; operation address register; program counter; program address counter;… … Automatikos terminų žodynas
Instruction level parallelism — (ILP) is a measure of how many of the operations in a computer program can be performed simultaneously. Consider the following program: 1. e = a + b 2. f = c + d 3. g = e * fOperation 3 depends on the results of operations 1 and 2, so it cannot… … Wikipedia
Instruction Pointer — [dt. Befehlszeiger] (auch EIP, extended Instruction Pointer), dasjenige Register des Prozessors, das die Speicheradresse des nächsten auszuführenden Maschinenbefehls enthält. Nachdem der Prozessor eine Anweisung abgearbeitet hat, lädt er den… … Universal-Lexikon
Register renaming — In computer engineering, register renaming refers to a technique usedto avoid unnecessary serialization of program operations imposed by the reuseof registers by those operations.Problem definitionPrograms are composed of instructions which… … Wikipedia
Register machine — In mathematical logic and theoretical computer science a register machine is a generic class of abstract machines used in a manner similar to a Turing machine. All the models are Turing equivalent. Contents 1 Overview 2 Formal definition 3 … Wikipedia
Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… … Wikipedia
Instruction cycle — An instruction cycle (sometimes called fetch and execute cycle, fetch decode execute cycle, or FDX) is the basic operation cycle of a computer. It is the process by which a computer retrieves a program instruction from its memory, determines what … Wikipedia
Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… … Wikipedia
Instruction scheduling — In computer science, instruction scheduling is a compiler optimization used to improve instruction level parallelism, which improves performance on machines with instruction pipelines. Put more simply, without changing the meaning of the code, it … Wikipedia
Instruction Set Architecture — Eine Befehlssatzarchitektur (engl. Instruction Set Architecture, kurz: ISA) ist – vereinfacht gesagt – die formale Spezifikation bestimmter Verhaltensweisen eines Prozessors aus Sicht seines Programmierers, auf die sich dieser bei der… … Deutsch Wikipedia